1. Field of the Invention
The present invention relates in general to a process for fabricating electrodes for the capacitor dielectric of semiconductor memory devices, and in particular, to a process for fabricating low leakage current electrodes for capacitor storage dielectric of high-density semiconductor memory devices. More particularly, the present invention relates to a process for fabricating electrodes of storage dielectrics for high-density semiconductor memory devices having good capacitance and leakage current characteristics realized at low pressure in a cold wall reactor.
2. Technical Background
High-density semiconductor memory devices, especially DRAM devices, are being developed to the giga-bits per device level. Dielectric storage materials utilized in present-day mega-bit memory devices employing the current material technology in device fabrication will not carry these memory devices to storage densities higher than about 256M per device. This is primarily due to the limitation of the memory cell charge density they can hold and sustain for a reasonable period of time before requiring refreshing.
Among the materials considered for the storage dielectrics in the next generation of giga-bit memory devices, chemical vapor deposited TiO.sub.2 films appear to be promising due to their inherent high permittivity and excellent step coverage characteristics. One serious problem, however, in utilizing these high dielectric constant storage materials is the high leakage current when they are implemented in the storage dielectrics utilizing the current technology. Until now, however, very little attention has been paid to the techniques used to reduce the leakage current in TiO.sub.2 thus preventing the use of TiO.sub.2 as a successful storage dielectric in the high-density memory devices. Systematic characterization of electrical properties of low-pressure chemical vapor deposited TiO.sub.2 treated under different electrode materials is effectively unavailable at this stage.